TLE7368 Datasheet, PDF (32/39 Pages) Infineon Technologies AG – Next Generation Micro Controller Supply

TLE7368
Detailed Internal Circuits Description
input WDI. A valid trigger signal is a falling edge from V_WDI,high to V_WDI,low. After receiving a valid trigger signal within
the "Open Window" the watchdog immediately terminates the "Open Window" and enters the "Closed Window"
state. The "Closed Window" has a fixed duration t_WD,W. During normal operation a trigger signal should not be
applied during the "Closed Window. After the "Closed Window" time t_WD,W an the watchdog returns back to the
"Open Window" state. Within the "Open Window", a valid trigger signal must be applied to the watchdog input WDI.
In normal operation, the watchdog continues to cycle between the "Open Window" and "Closed Window" state. If
reset signal RO_2 is asserted and transitions to a low state, then the watchdog needs to be reinitialized as
described in the Initialization section. The watchdog output WDO stays high as long as the watchdog input WDI
is triggered correctly.
Valid Trigger Signal:
Please refer to Figure 9.
Watchdog input WDI is periodically sampled with a period of T_WD. A valid trigger signal is a falling edge from
V_WDI,high to V_WDI,low. To improve immunity against noise or glitches on the WDI input, at least two high samples
followed two low samples are required for a valid trigger signal. For example, if the first three samples (two HGH
one LOW) of the trigger pulse at pin WDI are inside the closed window and only the fourth sample (the second
LOW sample) is taken in the open window then the watchdog output WDO will remain High.
Invalid Triggering:
Please refer to Figure 8 and Figure 9.
No trigger signal detected during the "Open Window" or a trigger signal detected during the "Closed Window", is
considered invalid triggering. Watchdog output WDO switches to low for a duration of t_WD,W immediately after no
valid trigger during the "Open Window" or immediately if a trigger signal is detected during the "Closed Window".
Fault Operation:
If a capacitor failure on the watchdog timing pin RT causes a short circuit to GND, then the internal oscillator stops
operating. Without oscillator operation there is no time reference for the watchdog so it does not know when the
"Closed Window" period has ended. Thus, every second trigger signal on watchdog input WDI generates a
watchdog failure causing WDO to switch from high to low. An open circuit at pin RT also causes WDO to switch
from high to low.
&ORVHG:LQGRZ
:',
2SHQ:LQGRZ
:DWFKGRJ
2XWSXW:'2
2SHQ:LQGRZ
+LJK
1RUPDO
&ORVHG:LQGRZ
:',
:',
/RZ
)DXOW
:',
:DWFKGRJ'HFRGHU6DPSOH3RLQW
Figure 9 Window Watchdog Input Signal Validation
Data Sheet
32
Rev. 1.1, 2007-11-08