HDSP2110S Datasheet, PDF (3/13 Pages) Infineon Technologies AG – 8-Character 5x7 Dot Matrix Parallel Input Alphanumeric Intelligent Display

Figure 3. Read Cycle Timing Diagram
A0-A3
FL
Tacs
CE
RD
D0-D7
Tacc
Tce
Tces
Tr
Tach
Tcer
Tceh
Trd
Tdf
Tacs
Cascading Displays
The HDSP211XS oscillator is designed to drive up to 16 other
HDSP211XSs with input loading of 15 pF each.
The following are the general requirements for cascading 16
displays together:
• Determine the correct address for each display.
• Use CE from an address decoder to select the correct
display.
• Select one of the Displays to provide the clock for the other
displays. Connect CLKSEL to V_CC for this display.
• Tie CLKSEL to ground on other displays.
• Use RTS to synchronize the blinking between the displays.
Figure 4. Cascading Diagram
RD
WR
FL
RST
VCC
RD WR FL RST CLK I/O CLKSEL
Display
D0-D7 A0-A4
CE
Data I/O
Address
A6
0
A7
Address
A8
Decoder ^{Address Decode Chip 1 to 14}
A9
15
Up to14 More Displays
in between
RD WR FL RST CLK I/O CLKSEL
Display
D0-D7 A0-A4
CE
 2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • [phone]
3
HDSP2110S/1S/2S/3S/4S/5S
March 24, 2000-13