XC164N-16F Datasheet, PDF (28/73 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164N
Derivatives
Functional Description
Table 4
XC164N Interrupt Nodes (cont’d)
Source of Interrupt or PEC
Service Request
Control
Register
Vector
Location¹⁾
Trap
Number
CAPCOM6 Timer T12
CCU6_T12IC xx’0134_H
4D_H / 77_D
CAPCOM6 Timer T13
CCU6_T13IC xx’0138_H
4E_H / 78_D
CAPCOM6 Emergency
CCU6_EIC
xx’013C_H
4F_H / 79_D
CAPCOM6
CCU6_IC
xx’0140_H
50_H / 80_D
SSC1 Transmit
SSC1_TIC
xx’0144_H
51_H / 81_D
SSC1 Receive
SSC1_RIC
xx’0148_H
52_H / 82_D
SSC1 Error
SSC1_EIC
xx’014C_H
53_H / 83_D
Unassigned node
–
xx’0150_H
54_H / 84_D
Unassigned node
–
xx’0154_H
55_H / 85_D
Unassigned node
–
xx’0158_H
56_H / 86_D
Unassigned node
–
xx’015C_H
57_H / 87_D
Unassigned node
–
xx’0164_H
59_H / 89_D
Unassigned node
–
xx’0168_H
5A_H / 90_D
Unassigned node
–
xx’016C_H
5B_H / 91_D
Unassigned node
–
xx’0170_H
5C_H / 92_D
Unassigned node
–
xx’0174_H
5D_H / 93_D
Unassigned node
–
xx’0100_H
40_H / 64_D
Unassigned node
–
xx’0104_H
41_H / 65_D
Unassigned node
–
xx’012C_H
4B_H / 75_D
Unassigned node
–
xx’00FC_H
3F_H / 63_D
Unassigned node
–
xx’0160_H
58_H / 88_D
1) Register VECSEG defines the segment where the vector table is located to.
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting, with a distance of 4 (two words) between two vectors.
Data Sheet
26
V1.2, 2006-08