TLE7184F3V Datasheet, PDF (24/36 Pages) Infineon Technologies AG – System IC for B6 motor drives

TLE7184F-3V
Description of Modes, Protection and Diagnostic Functions
Sleep Mode:
The sleep mode is entered if the device is in the Go-to-sleep Mode and the VDD voltage is lower than V_DDsleep.
The complete chip is deactivated beside the wake-up function (see Wake-up Mode). This mode is designed for
lowest current consumption from the power net of the car. The passive clamping is active. For details see the
description of passive clamping, see Chapter 9.2.14.
The only way to leave the Sleep Mode is to go to the Wake-up Mode.
Wake-up Mode:
The TLE7184F-3V wakes up if INH (=KL15) is high or if IFMA is low and V_VS is higher than V_VSLO.
In this mode all supplies are ramping up. As soon as the internal 5V is available, a so called wake-up timer starts
to run. If the IC reaches this state, the wake-up will continue even if the wake-up signals at INH or IFMA disappear.
The PWM interface (IFMA) is active as soon as the VDD voltage is sufficiently high. During this time it is expected
that the supplies are powered up and the µC sets the RGS to high. All external MOSFETs are switched off actively
or passively. When the wake-up timer is expired the IC goes into the Error mode.
In this mode all errors will be ignored beside Over Temperature Shut Down or V_S Under Voltage Lockout.
Error Mode
The Error Mode can be reached in 2 different ways:
1. The device is in Wake-up Mode and the wake-up timer expires
2. The device is in Normal Mode and one or more of the following errors occur: VREG Under Voltage Shut Down,
VDD Under Voltage Shut Down, Over Current Shut Down, VDH Over Voltage Shut Down, IOV Over Voltage
Shut Down, Short Circuit Detection or SCDL Open Detection.
In this mode an Error is set at the ERROR Pin and all external MOSFETs are actively switched off as long as the
bootstrap voltages allows it. The interface is active. VDHS switch is on and the current sense functions are
working. VDD and VREG are active. Passive clamping is not active.
The Error mode can be left in the following ways:
1. If no error is present, the IC can be sent to Normal Mode by a reset with the RGS pin.
2. If a VREG Under Voltage Shut Down occurs the device will go to VREG Shut-down Mode.
3. If VDD Under Voltage Shut Down occurs the device will go into Deadlock Mode.
Normal Mode
The Normal Mode can be reached by:
1. The device is in Error Mode, no error is present and a reset is performed by the RGS pin.
In the Normal Mode all functions are active and available with the regular limitations of the bootstrap principle. The
gate drive output stages can be controlled with the input pins.
The Normal Mode can be left in 4 ways:
1. The devices goes to the Go-To-Sleep Mode by setting RGS to low for a time longer than t_sleep.
2. If a VREG Under Voltage Shut Down occurs the device will go to VREG Shut-down Mode.
3. If VDD Under Voltage Shut Down occurs the device will go into Deadlock Mode.
4. If one or more of the following errors occur, the device goes to the Error Mode: VREG Under Voltage Shut
Down, VDD Under Voltage Shut Down, Over Current Shut Down, VDH Over Voltage Shut Down, IOV Over
Voltage Shut Down, Short Circuit Detection or SCDL Open Detection.
Go-To-Sleep Mode
The Go-To-Sleep Mode can be reached in 2 different ways:
1. The device is in Normal Mode and RGS is set to low for a time longer than t_sleep.
2. The device is in VREG Shut-down Mode and RGS is set to low for a time longer than t_sleep.
Datasheet
24
Rev.1.2, 2016-01-27