HYB25L256160AC Datasheet, PDF (21/55 Pages) Infineon Technologies AG – 256-Mbit Mobile-RAM

HYB25L256160AC
256-Mbit Mobile-RAM
Electrical Characteristics
Table 9 Input and Output Capacitances
Parameter
Input Capacitance: CLK
Input Capacitance: All other input-only pins
Input/Output Capacitance: DQ
Symbol
C_I1
C_I2
C_IO
Values
min. typ. max.
–
– 3.5
–
– 3.8
4.0 – 5.0
Unit
pF
pF
pF
Note/
Test Condition
1)
1)
1)
1) These values are guaranteed by design and are tested on a sample base only. V_DDQ = V_DD = 2.5 V ± 0.2 V, f = 1 MHz,
T_CASE = 25 ° C, V_OUT(DC) = V_DDQ/2, V_OUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.
4.2
Timing Characteristics
Table 10 AC Timing Characteristics¹⁾²⁾
Parameter
Symbol
–8
–7.5
Unit Note/ Test Condition
min. max. min. max.
Clock
DQ output access time from CLK
CK high-level width
CK low-level width
Clock cycle time
Clock frequency
Transition time
Setup and Hold Times
t_AC3
–
7.5
–
7.5
ns V_DDQ < 2.3 V ^3)4)5)8)
–6
–6
ns V_DDQ ≥ 2.3 V ^3)4)5)8)
t_AC2
–
7.5
–
7.5
ns V_DDQ < 2.3 V ^3)4)5)8)
–6
–6
ns V_DDQ ≥ 2.3 V ^3)4)5)8)
t_CH
3–
2.5 –
ns –
t_CL
3–
2.5 –
ns –
t_CK3
8
–
7.5 –
ns V_DDQ ≥ 2.3 V ³⁾
8–
8–
ns V_DDQ < 2.3 V ³⁾
t_CK2
9.5 –
9.5 –
ns ³⁾
f_CK3
–
125 –
133
MHz V_DDQ ≥ 2.3 V ³⁾
–
125 –
125
MHz V_DDQ < 2.3 V ³⁾
f_CK2
–
105 –
105
MHz ³⁾
t_T
0.5 1.5
0.3 1.2
ns –
Input setup time
Input hold time
CKE setup time
CKE hold time
Mode register setup time
Power down moder entry time
Common Parameters
t_IS
2–
t_IH
1–
t_CKS
2
–
t_CKH
1
–
t_RSC
2
–
t_SB
08
1.5 –
0.8 –
1.5 –
0.8 –
2–
0 7.5
ns ⁶⁾
ns ⁶⁾
ns ⁶⁾
ns ⁶⁾
t_CK –
ns –
Active to Read or Write delay
t_RCD
Precharge command period
t_RP
Active to Precharge command
t_RAS
Active bank A to Active bank A period t_RC
Active bank A to Active bank B delay t_RRD
CAS to CAS command delay
t_CCD
19 –
19 –
ns ⁷⁾
19 –
19 –
ns ⁷⁾
48 100000 45 100000 ns ⁷⁾
70 –
67 –
ns ⁷⁾
16 –
15 –
ns ⁷⁾
1–
1–
t_CK –
Data Sheet
21
V1.1, 2003-04-16