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XC167CI_02 Datasheet, PDF (20/79 Pages) Infineon Technologies AG – 16-Bi t Single-Chip Microcontroller Preliminary
XC167
Derivatives
Preliminary
General Device Information
Table 2
Pin Definitions and Functions (cont’d)
Symbol Pin Input Function
Num. Outp.
RSTIN 142 I
Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the XC167. An
internal pullup resistor permits power-on reset using only a
capacitor connected to VSS.
A spike filter suppresses input pulses <10 ns. Input pulses
>100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
Note: To let the reset configuration of PORT0 settle and to
let the PLL lock a reset duration of ca. 1 ms is
recommended.
BRK 143 O
OUT
Debug System: Break Out
BRKIN 144 I
Debug System: Break In
NC
1, 2, -
107 -
110
No connection.
It is recommended not to connect these pins to the PCB.
VAREF
VAGND
VDDI
41
-
42
-
48, 78, -
135
Reference voltage for the A/D converter.
Reference ground for the A/D converter.
Digital Core Supply Voltage (On-Chip Modules):
+2.5 V during normal operation and idle mode.
Please refer to the Operating Conditions
VDDP
6, 20, -
28, 58,
88,
103,
125
Digital Pad Supply Voltage (Pin Output Drivers):
+5 V during normal operation and idle mode.
Please refer to the Operating Conditions
VSSI
VSSP
47, 79, -
136,
139
5, 19, -
27, 89,
104,
126
Digital Ground.
Connect decoupling capacitors to adjacent VDD/VSS pin
pairs as close as possible to the pins.
All VSS pins must be connected to the ground-line or ground-
plane.
1) The CAN interface lines are assigned to ports P4, P7, and P9 under software control.
Data Sheet
16
V1.0, 2002-10