TLE7826G Datasheet, PDF (20/53 Pages) Infineon Technologies AG – Integrated double low-side switch, high-side/LED driver, hall supply, wake-up inputs and LIN communication with embedded MCU (32kB Flash)

TLE7826G
SPI (Serial Peripheral Interface)
8
SPI (Serial Peripheral Interface)
Control and status information between SBC and μC is exchanged via a digital interface, that is called “serial
peripheral interface” (SPI) on the SBC side, and “synchronous serial channel” (SSC) on the μC side. The 16-bit
wide Programming or Input Word of the SBC (see Table 2 to Table 8) is read in via the data input DI (with “LSB
first”), which is synchronized with the clock input CLK supplied by the μC. The Diagnosis or Output Word appears
synchronously at the data output DO (see Table 9).
The transmission cycle begins when the chip is selected by the Chip Select Not input CSN (“low” active). After the
CSN input returns from L to H, the word that has been read in becomes the new control word. The DO output
switches to tri-state status at this point, thereby releasing the DO bus for other usage.
The state of DI is shifted into the input register with every falling edge on CLK. The state of DO is shifted out of
the output register after every rising edge on CLK. The number of received input clocks is supervised by a modulo-
16 operation and the Input/Control Word is discarded in case of a mismatch.
This error is flagged by a “high” at the data output pin DO (interconnect to μC: P1.4) of the following SPI output
word before the first rising edge of the clock is received. Additionally the logic level of DO will be “OR-ed” with the
logic level of DI (P1.3).
Note: After wake-up from low-power modes the device needs to be set to Active Mode first before switches like
LS1, LS2, Supply Output and LED Driver can be turned on with the second SPI command.
Input
Data
MSB
LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CS1 CS0 MS2 MS1 MS0
WD
On/Off
Meas.
I/F
On/Off
Configuration Registers
Configuration Mode Selection
Select
Bits
ADC
Vbat/
Vtemp*
MON5
On/Off*
MON4
On/Off*
MON3
On/Off*
MON2
On/Off*
MON1
On/ Off*
LIN Reset Reset
10.4k* Delay* Thres*
00
not valid
000
Reserved
Reserved
Reserved 0**
LS2
On/Off
LS1
On/Off
HS-LED
OV/UV
disable
HS-LED
On /Off
Supply
Output
On/Off
01
Cyclic Wake Timing*
10
Bit Position: 9 .. 5
Window Watchdog Timing
11
Bit Position: 10 .. 5
(Watchdog Trigger Register )
not valid
001
Active
010
LIN Sleep
Active
011
Sleep
100
* remains unchanged after Vcc-UV or WD-RESET
** if bit set to „1" command will be ignored
not valid
101
110
LIN RxD Only
Stop
111
Figure 10 16-Bit SPI Input Data / Control Word
Data Sheet
20
Rev. 3.01, 2008-04-15