SPP21N50C3_07 Datasheet, PDF (2/14 Pages) Infineon Technologies AG – New revolutionary high voltage technology Worldwide best RDS(on) in TO 220 Ultra low gate charge

SPP21N50C3
SPI21N50C3, SPA21N50C3
Maximum Ratings
Parameter
Drain Source voltage slope
V_DS = 400 V, I_D = 21 A, T_j = 125 °C
Thermal Characteristics
Parameter
Thermal resistance, junction - case
Thermal resistance, junction - case, FullPAK
Thermal resistance, junction - ambient, leaded
Thermal resistance, junction - ambient, FullPAK
SMD version, device on PCB:
@ min. footprint
@ 6 cm² cooling area ³⁾
Soldering temperature, wavesoldering
1.6 mm (0.063 in.) from case for 10s ⁴⁾
Symbol
dv/dt
Value
50
Unit
V/ns
Symbol
R_thJC
R_{thJC_FP}
R_thJA
R_{thJA_FP}
R_thJA
T_sold
Values
Unit
min. typ. max.
-
-
0.6 K/W
-
-
3.6
-
-
62
-
-
80
-
-
62
-
35
-
-
- 260 °C
Electrical Characteristics, at T_j=25°C unless otherwise specified
Parameter
Symbol Conditions
Values
Unit
min. typ. max.
Drain-source breakdown voltage ^V_(BR)DSS ^V_GS^{=0V, I}_D^{=0.25mA 500}
-
Drain-Source avalanche
V_(BR)DS ^V_GS^{=0V, I}_D^=21A
- 600
breakdown voltage
-V
-
Gate threshold voltage
Zero gate voltage drain current
V_GS(th)
I_DSS
I_D=1000µA, V_GS=VDS 2.1
V_DS=500V, V_GS=0V,
T_j=25°C
-
T_j=150°C
-
3
3.9
µA
0.1 1
- 100
Gate-source leakage current
I_GSS
V_GS=20V, V_DS=0V
-
- 100 nA
Drain-source on-state resistance R_DS(on) ^V_GS^{=10V, I}_D^=13.1A
Ω
T_j=25°C
- 0.16 0.19
T_j=150°C
- 0.54 -
Gate input resistance
R_G
f=1MHz, open drain
-
0.53
-
Rev. 3.0
Page 2
2007-08-30