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HYS64D16000 Datasheet, PDF (19/24 Pages) Infineon Technologies AG – 200-Pin Small Outline Dual-In-Line Memory Modules
HYS64D[32020/16000]HDL–6–C
Small Outline DDR SDRAM Modules
SPD Contents
4
SPD Contents
Table 10 SPD Codes for HYS64D[32020/16000]HDL–6–C
Part Number & Organization
HYS64D16000HDL–6–C
128MB
×64
1 Rank
–6
Byte# Description
HEX
0
Programmed SPD Bytes in E2PROM
80
1
Total number of Bytes in E2PROM
08
2
Memory Type DDR = 07h
07
3
# of Row Addresses
0D
4
# Number of Column Addresses
09
5
# of DIMM Ranks
01
6
Data Width (LSB)
40
7
Data Width (MSB)
00
8
Interface Voltage Levels
04
9
tCK @ CLmax (Byte 18) [ns]
60
10
tAC SDRAM @ CLmax (Byte 18) [ns]
70
11
DIMM Configuration Type (non- / ECC) 00
12
Refresh Rate
82
13
Primary SDRAM width
10
14
Error Checking SDRAM width
00
15
tCCD [cycles]
01
16
Burst Length Supported
0E
17
Number of Banks on SDRAM
04
18
CAS Latency
0C
19
CS Latency
01
20
WE (Write) Latency
02
21
DIMM Attributes
20
22
Component Attributes
C1
23
tCK @ CLmax -0.5 (Byte 18) [ns]
75
24
tAC SDRAM @ CLmax -0.5 [ns]
70
25
tCK @ CLmax -1 (Byte 18) [ns]
00
26
tAC SDRAM @ CLmax -1 [ns]
00
27
tRPmin (ns)
48
28
tRRDmin [ns]
30
29
tRCDmin [ns]
48
30
tRASmin [ns]
2A
31
Module Density per Rank
20
32
tAS, tCS [ns]
75
33
tAH, TCH [ns]
75
34
tDS [ns]
45
HYS64D32020HDL–6–C
256MB
×64
2 Ranks
–6
HEX
80
08
07
0D
09
02
40
00
04
60
70
00
82
10
00
01
0E
04
0C
01
02
20
C1
75
70
00
00
48
30
48
2A
20
75
75
45
Data Sheet
19
Rev. 0.5, 2003-08