1EDI05I12AH Datasheet, PDF (16/17 Pages) Infineon Technologies AG – Single channel IGBT gate driver IC in wide body package

EiceDRIVER^™ 1EDI Compact
Single channel IGBT gate driver IC in wide body package
Application Notes
6
Application Notes
6.1
Reference Layout for Thermal Data
Figure 10 Reference Layout for Thermal Data (Copper thickness 35 μm)
This PCB layout represents the reference layout used for the thermal characterization.
Pin 4 (GND1) and pin 5 (GND2) require each a ground plane of 100 mm² for achieving maximum power
dissipation. The package is built to dissipate most of the heat generated through these pins.
The thermal coefficient junction-top (Ψ_th,jt) can be used to calculate the junction temperature at a given top
case temperature and driver power dissipation:
6.2
Printed Circuit Board Guidelines
The following factors should be taken into account for an optimum PCB layout.
• Sufficient spacing should be kept between high voltage isolated side and low voltage side circuits.
• The same minimum distance between two adjacent high-side isolated parts of the PCB should be
maintained to increase the effective isolation and to reduce parasitic coupling.
• In order to ensure low supply ripple and clean switching signals, bypass capacitor trace lengths should be
kept as short as possible.
Revision History
Page or Item
Subjects (major changes since previous revision)
Rev. 2.0, 2016-07-05
Logic Input
extended description of VCC1 scaled input thresholds
Rev. 1.0, 2016-04-20
el. Parameters
missing product parameters updated
Rev. 0.51, 2015-11-05
all pages
change of template, standardized package drawing included
Rev. 0.50, 2014-05-05
all pages
initial version
Datasheet
16
Rev. 2.0
2016-07-05