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TLE7810G Datasheet, PDF (15/53 Pages) Infineon Technologies AG – Integrated double low-side switch, high-side/LED driver, hall supply, wake-up inputs and LIN communication with embedded MCU (16kB Flash) | |||
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TLE7810G
Operating Modes
4.5.3 SBC Stop Mode with Cyclic Wake
The SBC Stop Mode has the advantage of reducing the current consumption to a minimum, while supplying the
microcontroller with its quiescent current during its power saving mode (âStopâ). This mode is entered via SPI
command, and turns-off the integrated LIN bus transceiver, but the voltage regulator remains active.
The SBC periodically generates a wake-up âlowâ pulse at DO (âinterconnect signalâ) that is connected to an
interrupt input [P1.4] of the microcontroller. This period can be defined via the âcyclic wake periodâ bit field within
the SPI register. This pulse at DO has a length of two internal SBC cycles.
In case of a detected wake-up event via LIN message or any of the MONx pins, DO stays âlowâ until the first valid
SPI command.
Note: The window watchdog is automatically disabled once the LDO output current goes below a specified
âwatchdog current thresholdâ, unless the SPI setting âWD On/Offâ prevents this (see Figure 10).
Note: A wake-up event via LIN message or via MONx inputs can happen independently of the cyclic wake phase.
Note: The Window Watchdog starts with a âlong open windowâ after a mode switch, e.g. to SBC Active Mode.
SBC Active Mode
MS2 MS1 MS0 Vcc
0
1 0 / 1 ON
SBC Standby Mode
Vcc
ON
Start Up
Power Up
âsingleâ µController SPI -Command:
- select âcyclic wake timingâ via SPI Timing Bits
- select SBC Stop Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[âoffâ once current consumption below threshold ]
select SBC
operating
mode
STOP: Cyclic Wake
MS2 MS1 MS0 Vcc
1
1
1
ON
transition caused by: 2)
- event at MONx inputs:
=> DO âlowâ
- LIN message
=> RxD + DO âlowâ
[SPI indicates source]
cyclic wake-up
µC 1)
µC wake-up inputs
NOTES:
1) window watchdog activated
automatically once current
threshold is exceeded
2) wake-up via MONx inputs and
LIN message independent of cyclic
wake phase (âasynchronousâ)
Figure 8 State Diagram âSBC Stop Mode with Cyclic Wakeâ
Data Sheet
15
Rev. 3.01, 2008-04-15
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