TLE7240SL Datasheet, PDF (15/28 Pages) Infineon Technologies AG – 8 Channel Protected Low-Side Relay Switch

SPI Driver for Enhanced Relay Control
SPIDER - TLE 7240SL
Input and Power Stages
Electrical Characteristics: Supply and Input
All voltages with respect to ground, positive current flowing into pin
unless otherwise specified: V_DD = 3.0 V to V_DDA, V_DDA= 4.5V to 5.5V, T_j = -40 °C to +150 °C
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
Output characteristics
5.3.11 On-State resistance per channel R_DS(ON) –
1.5
–
Ω
I_L = 180 mA
T_j = 25 °C ¹⁾
5.3.12 Nominal load current
–
2.2
3.0
I_L = 180 mA
T_j = 150 °C
I_L(nom)
210
–
–
mA ¹⁾all channels on
T_a = 85 °C
T_j,max = 150 °C
based on R_thja,2s2p
5.3.13 Output leakage current in stand-by I_D(STB)
µA
V_DS = 13.5 V
mode
–
–
1
T_j = 25 °C ¹⁾
(per channel)
–
–
2
T_j = 85 °C ¹⁾
–
–
5
T_j = 150 °C
5.3.14 Output clamping voltage
V_DS(CL)
41
–
54
V
Input Characteristics
5.3.15
5.3.16
5.3.17
5.3.18
L level of pins IN1..IN4 and LHI
V_IN(L)
H level of pins IN1..IN4 and LHI
V_IN(H)
L-input pull-down current through pin IN I_IN(L)
H-input pull-down current through pin I_IN(H)
IN
Reset Characteristics
0
–
2.0
–
3
12
10
40
0.6
V
5.5
V
2)
80
µA
1) _{VIN = 0.6 V}
80
µA
V_DD = 5.5 V
V_IN = V_DD
5.3.19 L level of pin RST
V_RST(L)
0
–
5.3.20 H level of pin RST
V_RST(H)
0.4*
–
V_DD
5.3.21 L-input pull-down current through pin I_RST(L)
3
12
RST
0.2*
V_DD
V_DD
80
µA
1) _{VRST = 0.6 V}
5.3.22 H-input pull-down current through pin I_RST(H)
10
40
80
µA
V_DD = 5.5 V
RST
V_RST = V_DD
Timings
5.3.23 Reset wake-up time
t_wu(RST)
–
–
200 µs
5.3.24 Reset and LHI signal duration
t_RST(L)
50
–
–
µs
5.3.25 Turn-on time
V_DS = 20% V_bat
t_ON
30
50
µs
V_bat = 13.5 V
resistive load
all channels
I_DS = 180 mA
5.3.26 Turn-off time
V_DS = 80% V_bb
t_OFF
–
30
50
µs
V_bat = 13.5 V
resistive load
all channels
I_DS = 180 mA
1) not subject to production test
2) level must not exceed V_DD+0.3V < 5.5 V
Data Sheet
15
Rev. 1.1, 2009-04-15