TLE7240SL Datasheet, PDF (10/28 Pages) Infineon Technologies AG – 8 Channel Protected Low-Side Relay Switch

SPI Driver for Enhanced Relay Control
SPIDER - TLE 7240SL
General Product Characteristics
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos. Parameter
4.2.1
4.2.1
4.2.2
Digital supply voltage
Analog supply voltage
extended supply range
Symbol
V_DD
V_DDA
V_DDA
Limit Values
Min.
Max.
3.0
5.5
4.5
5.5
4.0
4.5
4.2.3 Digital Supply current in reset mode I_DD(RST) –
10
4.2.4 Digital supply current
(all channels active)
I_DD(ON)
–
0.5
4.2.5 Analog supply current
(all channels active)
I_DDA(ON) –
5
Unit Conditions
V
–
V
–
parameter
deviations are
possible
µA
T_j = 85 °C
mA V_DD = V_DDA = 5 V
V_RST = V_CS = V_DD
V_SCLK = 0 V
V_IN = 0 V
mA
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos. Parameter
4.3.6 Junction to Soldering Point
Symbol
R_thJSP
Limit Values
Min. Typ. Max.
–
–
25
Unit
K/W
Conditions
1) 2)
4.3.7
4.3.8
Junction to Ambient
(1s0p+600mm²Cu)
Junction to Ambient (2s2p)
R_thJA
–
R_thJA
–
68
–
62
–
K/W ^{1) 3)}
K/W ^{1) 4)}
1) Not subject to production test, specified by design
2) Specified R_thJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature).
T_a = 25 °C. LS1 to LS8 are dissipating 1 W power (0.125 W each).
3) Specified R_thJA value is according to Jedec JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600mm²
and 70 µm thickness. T_a = 25 °C, LS1 to LS8 are dissipating 1 W power (0.125 W each).
4) Specified R_thJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).
T_a = 25 °C, LS1 to LS8 are dissipating 1 W power (0.125 W each).
Data Sheet
10
Rev. 1.1, 2009-04-15