XC2797X Datasheet, PDF (141/147 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance

XC2797X
XC2000 Family Derivatives / High Line
Electrical Parameters
Table 42 JTAG Interface Timing for Lower Voltage Range (cont’d)
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
TDI/TMS hold after TCK t₇ SR 6
−
−
ns
rising edge
TDO valid from TCK falling t₈ CC −
edge (propagation delay)¹⁾
32
36
ns
TDO high impedance to t₉ CC −
valid output from TCK
falling edge²⁾¹⁾
32
36
ns
TDO valid output to high t₁₀ CC −
impedance from TCK
falling edge¹⁾
32
36
ns
TDO hold after TCK falling t₁₈ CC 5
−
−
ns
edge¹⁾
1) The falling edge on TCK is used to generate the TDO timing.
2) The setup time for TDO is given implicitly by the TCK cycle time.
t₁
0.5 VDDP
t₅
t₂
t₃
Figure 29 Test Clock Timing (TCK)
0.9 V_DDP
t₄
0.1 V_DDP
MC_ JTAG_ TCK
Data Sheet
141
V1.2, 2010-09