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ICE3RBR0665JZ Datasheet, PDF (14/31 Pages) Infineon Technologies AG – Off-Line SMPS Current Mode Controller with integrated 650V
ICE3RBR0665JZ
Functional Description
3.6.1
Leading Edge Blanking
VSense
Vcsth
tLEB = 220ns
For example, Ipeak = 0.5A with RSense = 2. The current
sense threshold is set to a static voltage level Vcsth=1V
without Propagation Delay Compensation. A current
ramp of dI/dt = 0.4A/µs, or dVSense/dt = 0.8V/µs, and a
propagation delay time of tPropagation Delay =180ns leads
to an Ipeak overshoot of 14.4%. With the propagation
delay compensation, the overshoot is only around 2%
(see Figure 20).
t
Figure 18 Leading Edge Blanking
Whenever the integrated CoolMOS® is switched on, a
leading edge spike is generated due to the primary-
side capacitances and reverse recovery time of the
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked out with a time constant of tLEB = 220ns.
3.6.2 Propagation Delay Compensation
In case of over-current detection, there is always
propagation delay to switch off the integrated
CoolMOS®. An overshoot of the peak current Ipeak is
induced to the delay, which depends on the ratio of dI/
dt of the peak current (see Figure 19).
V
1,3
1,25
1,2
1,15
1,1
1,05
1
0,95
0,9
0
with compensation
without compensation
0,2 0,4 0,6 0,8
1 1,2 1,4 1,6 1,8
dVSense
dt
2V
μs
Figure 20 Overcurrent Shutdown
The Propagation Delay Compensation is realized by
means of a dynamic threshold voltage Vcsth (see Figure
21). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
ISense
Ipeak2
Ipeak1
ILimit
Signal2
IOvershoot2
Signal1
tPropagation Delay
IOvershoot1
VOSC max. Duty Cycle
VSense
V csth
off time
Propagation Delay t
t
Figure 19 Current Limiting
The overshoot of Signal2 is larger than of Signal1 due
to the steeper rising waveform. This change in the
slope depends on the AC input voltage. Propagation
Delay Compensation is integrated to reduce the
overshoot due to dI/dt of the rising primary current.
Thus the propagation delay time between exceeding
the current sense threshold Vcsth and the switching off
of the integrated CoolMOS® is compensated over
temperature within a wide range. Current Limiting is
then very accurate.
Figure 21
Signal1
Signal2
t
Dynamic Voltage Threshold Vcsth
Version 2.0
14
7 Jun 2013