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ICE3A1065LJ Datasheet, PDF (12/26 Pages) Infineon Technologies AG – Power Management Supply
CoolSET™-F3
ICE3A1065LJ
Functional Description
the 8.0us spike blanking time, the Auto Restart Mode is
activated.
For example, if CBK = 0.22uF, IBK = 8.4uA
Blanking time = 20ms + CBK x (4.0 - 0.9) / IBK = 100ms
The 20ms blanking time circuit after C4 is disabled by
the soft stat block such that the controller can start up
properly.
The Active Burst Mode has basic blanking mode only
while the Auto Restart Mode has both the basic and the
extendable blanking mode.
3.6.2
Active Burst Mode
The IC enters Active Burst Mode under low load
conditions. With the Active Burst Mode, the efficiency
increases significantly at light load conditions while still
maintaining a low ripple on VOUT and a fast response on
load jumps. During Active Burst Mode, the IC is
controlled by the FB signal. Since the IC is always
active, it can be a very fast response to the quick
change at the FB signal. The Start up Cell is kept OFF
in order to minimize the power loss.
4.5V
FB
1.35V
20 ms Blanking
Time
Internal Bias
Current
Limiting
&
G10
C4
Active
Burst
C5
&
Mode
G6
C6a
3.61V
C6b
3.0V
&
G11
Control Unit
it starts to count. When the counter reach 20ms and FB
signal is still below 1.35V, the system enters the Active
Burst Mode. This time window prevents a sudden
entering into the Active Burst Mode due to large load
jumps.
After entering Active Burst Mode, a burst flag is set and
the internal bias is switched off in order to reduce the
current consumption of the IC to approx. 450uA.
It needs the application to enforce the VCC voltage
above the Undervoltage Lockout level of 10.5V such
that the Startup Cell will not be switched on
accidentally. Or otherwise the power loss will increase
drastically. The minimum VCC level during Active Burst
Mode depends on the load condition and the
application. The lowest VCC level is reached at no load
condition.
3.6.2.2 Working in Active Burst Mode
After entering the Active Burst Mode, the FB voltage
rises as VOUT starts to decrease, which is due to the
inactive PWM section. The comparator C6a monitors
the FB signal. If the voltage level is larger than 3.61V,
the internal circuit will be activated; the Internal Bias
circuit resumes and starts to provide switching pulse. In
Active Burst Mode the gate G10 is released and the
current limit is reduced to 0.31V. In one hand, it can
reduce the conduction loss and the other hand, it can
reduce the audible noise. If the load at VOUT is still kept
unchanged, the FB signal will drop to 3.0V. At this level
the C6b deactivates the internal circuit again by
switching off the internal Bias. The gate G11 is active
again as the burst flag is set after entering Active Burst
Mode. In Active Burst Mode, the FB voltage is changing
like a saw tooth between 3.0V and 3.61V (see figure
17).
3.6.2.3 Leaving Active Burst Mode
The FB voltage will increase immediately if there is a
high load jump. This is observed by the comparator C4.
As the current limit is ca. 31% during Active Burst
Mode, a certain load jump is needed so that the FB
signal can exceed 4.5V. At that time the comparator C4
resets the Active Burst Mode control which in turn
blocks the comparator C12 by the gate G10. The
maximum current can then be resumed to stabilize
VOUT.
Figure 16 Active Burst Mode
The Active Burst Mode is located in the Control Unit.
Figure 16 shows the related components.
3.6.2.1 Entering Active Burst Mode
The FB signal is kept monitoring by the comparator C4.
During normal operation, the internal blanking time
counter is reset to 0. When FB signal falls below 1.35V,
Version 2.4
12
19 Nov 2012