TLE7233EM Datasheet, PDF (11/33 Pages) Infineon Technologies AG – SPI Driver for Enhanced Relay Control

SPI Driver for Enhanced Relay Control
SPIDER - TLE7233EM
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos. Parameter
Symbol
Limit Values
Unit Conditions
Min. Typ. Max.
4.3.6
4.3.7
4.3.8
4.3.9
Junction to Case, bottom
Junction to Case, top
Junction to Pin (6,7,18 or 19)
Junction to Ambient
(1s0p, min. footprint)
R_thJC,back –
R_thJC,top –
R_thJPin
–
R_thJA,min –
–
4
K/W – ^{1) 2)}
–
35
K/W – ^{1) 2)}
–
15
K/W – ^{1) 2)}
95
–
K/W – ^{1) 3)}
4.3.10 Junction to Ambient
(1s0p + 300mm² Cu)
R_thJA,300 –
52
–
K/W – ^{1) 4)}
4.3.11 Junction to Ambient
(1s0p + 600mm² Cu)
R_thJA,600 –
45
–
K/W – ^{1) 5)}
4.3.12 Junction to Ambient (2s2p)
R_thJA,2s2p –
1) Not test subject to production test, specified by design
33
–
K/W – ^{1) 6)}
2) Specified R_thJC value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient temperature).
T_A = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
3) Specified R_thJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with minimal footprint copper area and 70 µm thickness.
T_A = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
4) Specified R_thJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 300 mm²
and 70 µm thickness. T_A = 85 °C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
5) Specified R_thJA value is according to JEDEC JESD51-2,-3 at natural convection on FR4 1s0p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper area of 600 mm²
and 70 µm thickness. T_A = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
6) Specified R_thJA value is according to JEDEC JESD51-2,-7 at natural convection on FR4 2s2p board; The product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu).
T_A = 85°C. Ch0 to Ch3 are dissipating 1 W power (0.25 W each).
Data Sheet
11
Rev. 1.2, 2014-05-09