TLE42994V33_14 Datasheet, PDF (11/33 Pages) Infineon Technologies AG – Extreme Low Current Consumption In ON State

4.3
Thermal Resistance
TLE42994V33
General Product Characteristics
Table 3 Thermal Resistance
Parameter
Symbol
Values
Unit Note / Test Condition
Number
Min. Typ. Max.
TLE42994GMV33 (PG-DSO-14)
Junction to Soldering Point¹⁾ R_thJSP –
Junction to Ambient¹⁾
R_thJA
–
Junction to Ambient¹⁾
R_thJA
–
Junction to Ambient¹⁾
R_thJA
–
Junction to Ambient¹⁾
R_thJA
–
–
30
63 –
112 –
73 –
65 –
K/W measured to pin 5
K/W FR4 2s2p board²⁾
K/W FR4 1s0p board, footprint
only³⁾
K/W FR4 1s0p board, 300mm²
heatsink area on PCB³⁾
K/W FR4 1s0p board, 600mm²
heatsink area on PCB³⁾
P_4.3.1
P_4.3.2
P_4.3.3
P_4.3.4
P_4.3.5
TLE42994EV33 (PG-SSOP-14 Exposed Pad)
Junction to Soldering Point¹⁾ R_thJSP –
Junction to Ambient¹⁾
R_thJA
–
Junction to Ambient¹⁾
R_thJA
–
10 –
47 –
140 –
K/W measured to all GND pins
K/W FR4 2s2p board²⁾
K/W FR4 1s0p board, footprint
only³⁾
P_4.3.6
P_4.3.7
P_4.3.8
Junction to Ambient¹⁾
R_thJA
–
63 –
K/W FR4 1s0p board, 300mm²
heatsink area on PCB³⁾
P_4.3.9
Junction to Ambient¹⁾
R_thJA
–
53 –
K/W FR4 1s0p board, 600mm²
heatsink area on PCB³⁾
P_4.3.10
1) not subject to production test, specified by design
2) Specified R_thJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified R_thJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm³ board with 1 copper layer (1 x 70µm Cu).
Data Sheet
11
Rev. 1.1, 2014-07-03