ICE1PCS01_07 Datasheet, PDF (11/18 Pages) Infineon Technologies AG – Standalone Power Factor Correction (PFC) Controller in Continuous Conduction Mode (CCM)

CCM-PFC
ICE1PCS01/G
Functional Description
From
L1
Full-wave
Retifier _R7
D1
R3 ^Vout
C2
R4
Current Loop
+
PWM Generation
V_IN
Av(I_IN)
Nonlinear
Gain
t
Gate Driver
GATE
OTA1
5V
VSENSE
ICE1PCS01/G
VCOMP
PWM Logic
HIGH to
turn on
VCC
Gate Driver
LV
Z1
External
MOS
GATE
* LV: Level Shift
ICE1PCS01/G
Figure 15 Gate Driver
The output is active HIGH and at VCC voltages below
the under voltage lockout threshold V_CCUVLO, the gate
drive is internally pull low to maintain the off state.
R6
C4
C5
Figure 14 Voltage Loop
3.8.2 Enhanced Dynamic Response
Due to the low frequency bandwidth of the voltage loop,
the dynamic response is slow and in the range of about
several 10ms. This may cause additional stress to the
bus capacitor and the switching transistor of the PFC in
the event of heavy load changes.
The IC provides therefore a “window detector” for the
feedback voltage V_VSENSE at pin 6 (VSENSE).
Whenever V_VSENSE exceeds the reference value (5V)
by +5%, it will act on the nonlinear gain block which in
turn affect the gate drive duty cycle directly. This
change in duty cycle is bypassing the slow changing
VCOMP voltage, thus results in a fast dynamic
response of V_OUT.
3.9 Output Gate Driver
The output gate driver is a fast totem pole gate drive. It
has an in-built cross conduction currents protection and
a Zener diode Z1 (see Figure 15) to protect the external
transistor switch against undesirable over voltages.
The maximum voltage at pin 8 (GATE) is typically
clamped at 11.5V.
Version 1.2
11
06 Feb 2007