ICB1FL02G Datasheet, PDF (11/37 Pages) Infineon Technologies AG – Smart Ballast Control IC for Fluorescent Lamp Ballasts

ICB1FL02G
Functional Description
3.2 PFC Preconverter
PFC is starting with a fixed frequent operation (ca. 25kHz), beginning with an on-time of 1µs and an off-time of
40µs. The on-time is enlarged every 400µs to a maximum on-time of 23µs. The control switches over into critical
conduction mode (CritCM) operation as soon as a sufficient ZCD signal is available. There is an overvoltage
threshold at 109% of rated Bus voltage that stops PFC Gate drive as long as the Bus voltage has reached a level
of 105% of rated Bus voltage again. The compensation of the voltage control loop is completely integrated. The
internal reference level of the Bus voltage sense (PFCVS) is 2,5V with high accuracy.
The PFC control operates in CritCM in the range of 23µs > on-time > 2,3µs. For lower loads the control operates
in discontinuous conduction mode (DCM) with an on-time down to 0,5µs and an increasing off-time. With this
control method the PFC preconverter covers a stable operation from 100% of load to 0,1% .
D1...4
90 ...
270 VAC
L_RFI
C1
L1
R1 Q1
R2
D9
D5
R3
R7
R8
R4
C2
C3 R9
R6
VBUS
PFCZCD
PFCGD
PFCVS
PFCCS
HSGD
HSVCC
HSGND
LSGD
LSCS
Vcc
C7
R5 R12 R13
Figure 5 Circuit Diagram of the PFC preconverter section.
Overvoltage, undervoltage and open loop detection at pin PFCVS are sensed by analog comparators. The BUS
voltage loop control is provided by a 8bit sigma-delta A/D-Converter with a sampling rate of 400µs and a resolution
of 4mV/bit. So a range of +/- 0,5V from the reference level of 2,50V is covered. The digital error signal has to pass
a digital notch filter in order to suppress the AC voltage ripple of twice of the mains frequency. A subsequent error
amplifier with PI characteristic cares for stable operation of the PFC preconverter. During ignition and pre-run
mode the notch filter is bypassed in order to increase control loop reaction.
The zero current detection is sensed by a separate pin PFCZCD. The information of finished current flow during
demagnetization is required in CritCM and in DCM as well. The input is equipped with a special filtering including
a blanking of typically 500ns and is combined with a large hysteresis between the thresholds of typically 0,5V and
1,5V. In case of bad coupling between primary inductor winding and secondary ZCD-winding an additional filtering
by a capacitor at ZCD pin might be necessary in order to avoid mistriggering by long lasting oscillations during
switching slopes of the PFC MOSFET.
Figure 6
PFCVS
Σ∆-ADC
SRate 400µs
Res 4mV/bit
Notch
Filter
Undervoltage
73% +/- 2,5%
PI Loop
Control
Overvoltage
109% +/-2,0%
Pulse width
Generator
Overcurrent
Protection
1,0V +/-5%
ZCD
1,50V / 0,5V
Start-up
Gate
Driver
PFCGD
PFCCS
PFCZCD
Open Loop
Detection
15% +/- 20%
Clock
600kHz
Reference
2,50V
+/-1,5%
Structure of the mixed digital and analog control of PFC preconverter.
Datasheet Version 1.2
11
February 2006