TLF1963 Datasheet, PDF (10/24 Pages) Infineon Technologies AG – Low Dropout Linear Voltage Post Regulator

TLF1963
Electrical Characteristics
Table 4 Electrical Characteristics: (cont’d)
V_I = 2.5 V - 20 V, T_j = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing out of the pin
(unless otherwise specified)
Pos. Parameter
Symbol Limit Values Unit Conditions
Min. Typ. Max.
5.1.27 Quiescent Current in
Shutdown ⁹⁾
I_q,off
–
5.1.28 Power Supply ripple rejection ¹⁰⁾ PSRR 55
0.01 1
67 –
µA V_I = 6 V; V_EN = 0 V;
T_j ≤ 85 °C
dB T_j = 25 °C;
f_r = 120 Hz;
I_Q = 0.75 A;
V_I - V_Q = 1.5 V;
V_r = 0.5 V_pp
5.1.29 Output current limitation
I_Q
–
2
–
A
T_j = 25 °C;
V_I = 7 V; V_Q = 0 V
5.1.30
I_Q
1.6 –
–
A
V_I = V_Q,nom + 1 V;
dV_Q = -0.1 V
5.1.31 Input Reverse Leakage Current I_I,rev
–
5.1.32 Reverse Output Current ¹¹⁾
I_Q,rev
–
–
2
mA
300 600 µA
V_I = -20 V;
V_Q = 0 V
T_j = 25 °C;
V_Q = 1.21 V;
V_I < 1.21 V
5.1.33
–
–
1
mA V_Q = 1.21 V;
V_I < 1.21 V
1) The TLF1963 is tested and specified for these conditions with the ADJ pin connected to the Q pin.
2) For TLF1963 dropout voltage will be limited by the minimum input voltage specification under some output voltage/load
conditions.
3) Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output
current range must be limited. When operating at maximum output current, the input voltage range must be limited.
4) To satisfy requirements for minimum input voltage, the TLF1963 is tested and specified for these conditions with an
external resistor divider (two 4.12 kΩ resistors) for an output voltage of 2.4 V. The external resistor divider will add a 300 µA
DC load on the output.
5) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output
current. In dropout, the output voltage will be equal to: V_I – V_dr
6) GND pin current is tested with V_I = V_Q,nom + 1 V and a current source load.
7) ADJ pin bias current flows into the ADJ pin.
8) EN pin current flows into the EN pin.
9) Specified by design, tested at T_amb = 25 °C
10) Not subject to production test, specified by design.
11) Reverse output current is tested with the IN pin grounded and the Q pin forced to the rated output voltage. This current
flows into the Q pin and out the GND pin
Data Sheet
10
Rev. 1.0, 2012-11-08