PTFB182503EFL Datasheet, PDF (10/12 Pages) Infineon Technologies AG – Thermally-Enhanced High Power RF LDMOS FETs

PTFB182503EL
PTFB182503FL
Package Outline Specifications
Package H-33288-6
4X R1.524
[R.060]
45° X 2.032
[45° X .080]
4X 30°
V
4X 1.143
[.045] (4 PLS)
D
2X 5.080
[.200] (2 PLS)
4.889±.510
V
[.192±.020]
S
9.779
9.398 _[.385]
CL ^[.370]
19.558±.510
[.770±.020]
2X R1.626
[R.064]
E
G
F
CL
2X 12.700
[.500]
2X 22.860
[.900]
27.940
[1.100]
22.352±.200
[.880±.008]
4.039
+.254
-.127
[^{.159+-.0.00150}]
1.575
[.062] (SPH)
1.016
[.040]
CL
34.036
[1.340]
H-33288-6_po_01_10-03-2012
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances ±0.127 [0.005] unless specified otherwise.
4. Pins: D – drain; G – gate; S – source; V – V_DD; E, F – N.C.
5. Lead thickness: 0.10 + 0.051/–0.025 mm [0.004 + 0.002/–0.001 inch].
6. Gold plating thickness: 0.25 micron [10 microinch] max.
Data Sheet
10 of 12
Rev. 07.2, 2016-06-10