ICE2QR0665G_14 Datasheet, PDF (10/27 Pages) Infineon Technologies AG – Off-Line SMPS Quasi-Resonant PWM Controller with integrated 650V CoolMOS? and startup cell in DSO-16/12

CoolSET™Q1
ICE2QR0665G
Functional Description
Figure 5 Maximum current sense voltage during soft start
3.3
Normal Operation
The PWM controller during normal operation consists of a digital signal processing circuit including an up/down
counter, a zero-crossing counter (ZC counter) and a comparator, and an analog circuit including a current
measurement unit and a comparator. The switch-on and -off time points are each determined by the digital
circuit and the analog circuit, respectively. As input information for the switch-on determination, the zero-
crossing input signal and the value of the up/down counter are needed, while the feedback signal V_FB and the
current sensing signal V_CS are necessary for the switch-off determination. Details about the full operation of the
PWM controller in normal operation are illustrated in the following paragraphs.
3.3.1 Digital Frequency Reduction
As mentioned above, the digital signal processing circuit consists of an up/down counter, a ZC counter and a
comparator. These three parts are key to implement digital frequency reduction with decreasing load. In
addition, a ringing suppression time controller is implemented to avoid mis-triggering by the high frequency
oscillation, when the output voltage is very low under conditions such as soft start period or output short circuit.
Functionality of these parts is described as in the following.
3.3.1.1 Up/down counter
The up/down counter stores the number of the zero crossing where the main power switch is switched on after
demagnetization of the transformer. This value is fixed according to the feedback voltage, V_FB, which contains
information about the output power. Indeed, in a typical peak current mode control, a high output power results
in a high feedback voltage, and a low output power leads to a low regulation voltage. Hence, according to V_FB,
the value in the up/down counter is changed to vary the power MOSFET off-time according to the output power.
In the following, the variation of the up/down counter value according to the feedback voltage is explained.
The feedback voltage V_FB is internally compared with three threshold voltages V_FBZL, V_FBZH and V_FBR1, at each
clock period of 48ms. The up/down counter counts then upward, keep unchanged or count downward, as shown
in Table 2.
Table 2 Operation of the up/down counter
V_FB
Always lower than V_FBZL
Once higher than V_FBZL, but always lower than V_FBZH
Once higher than V_FBZH, but always lower than V_FBR1
Once higher than V_FBR1
up/down counter action
Count upwards till 7
Stop counting, no value changing
Count downwards till 1
Set up/down counter to 1
Data Sheet
10
V2.1, 2014-04-01