BCR10PN_07 Datasheet, PDF (1/7 Pages) Infineon Technologies AG – NPN/PNP Silicon Digital Transistor Array

NPN/PNP Silicon Digital Transistor Array
BCR10PN
• Switching circuit, inverter, interface circuit,
driver circuit
• Two (galvanic) internal isolated NPN/PNP
Transistors in one package
• Built in bias resistor NPN and PNP
(R₁₌₁₀ kΩ, R₂ =10 kΩ)
• Pb-free (RoHS compliant) package¹⁾
• Qualified according AEC Q101
Tape loading orientation
Top View
654
W1s
123
Direction of Unreeling
Marking on SOT-363 package
(for example W1s)
corresponds to pin 1 of device
Position in tape: pin 1
opposite of feed hole side
EHA07193
4
5
6
3
2
1
C1
B2
E2
6
5
4
R₂
R₁
TR2
TR1
R₁
R₂
1
2
3
E1
B1
C2
EHA07176
Type
BCR10PN
Marking
W1s
Pin Configuration
Package
1=E1 2=B1 3=C2 4=E2 5=B2 6=C1 _SOT363
Maximum Ratings for NPN and PNP Types
Parameter
Collector-emitter voltage
Collector-base voltage
Input forward voltage
Input reverse voltage
DC collector current
Total power dissipation, T_S = 115 °C
Junction temperature
Storage temperature
Symbol
V_CEO
V_CBO
V_i(fwd)
V_i(rev)
I_C
P_tot
T_j
T_stg
Value
50
50
40
10
100
250
150
-65 ... 150
Thermal Resistance
Junction - soldering point²⁾
R_thJS
≤ 140
1Pb-containing _{package may be available upon special request}
2For _{calculation of RthJA please refer to Application Note Thermal Resistance}
Unit
V
mA
mW
°C
K/W
1
2007-07-24