ICS8752I Datasheet, PDF (9/14 Pages) Integrated Device Technology – LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

ICS8752I
LOW SKEW, 1-TO-8
LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
PARAMETER MEASUREMENT INFORMATION
1.65V±5%
1.25V±5%
V_DD,
V_DDA, V_DDO
LVCMOS
GND
SCOPE
Qx
V_DD,
V_DDA,V_DDO
LVCMOS
GND
SCOPE
Qx
-1.65V±5%
3.3V OUTPUT LOAD AC TEST CIRCUIT
(Where X denotes outputs in the same Bank)
-1.25V±5%
2.5V OUTPUT LOAD AC TEST CIRCUIT
V
DDO
Qx
2
V
DDO
Qy
2
t sk(o)
OUTPUT SKEW
QX0:QX3
V_DDO
2
QX0:QX3
V_DDO
2
t sk(b)
BANK SKEW
QA0:QA3,
QB0:QB3
V
DDO
2
tcycle n
V
DDO
2
➤
tcycle n+1
t jit(cc) = tcycle n –tcycle n+1
1000 Cycles
V
DDO
2
➤
CLK0,
CLK1
FB_IN
➤_t(Ø)
CYCLE-TO-CYCLE JITTER
STATIC PHASE OFFSET
QA0:QA3,
QB0:QB3
V
DDO
2
Pulse Width
t
PERIOD
odc = ^{t PW}
t _PERIOD
OUTPUT DUTY CYLCLE/PULSE WIDTH/PERIOD
8752CYI
20%
Clock
Outputs
80%
t_R
OUTPUT RISE/FALL TIME
www.idt.com
9
V_DD
2
V_DD
2
80%
t_F
20%
REV. C JULY 30, 2010