ICS87421I Datasheet, PDF (9/14 Pages) Integrated Device Technology – ÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR

ICS87421I
÷1/÷2 DIFFERENTIAL-TO-LVDS CLOCK GENERATOR
LVDS DRIVER TERMINATION
A general LVDS interface is shown in Figure 4. In a 100Ω
differential transmission line environment, LVDS drivers require
a matched load termination of 100Ω across near the receiver
3.3V
50Ω
input. For a multiple LVDS outputs buffer, if only partial outputs
are used, it is recommended to terminate the unused outputs.
3.3V
LVDS Driver
+
R1
100Ω
–
50Ω
100Ω Differential Transmission Line
FIGURE 4. TYPICAL LVDS DRIVER TERMINATION
IDT^™ / ICS^™ LVDS CLOCK GENERATOR
9
ICS87421AMI REV. A OCTOBER 3, 2007