ICS87001-01 Datasheet, PDF (9/12 Pages) Integrated Device Technology – LVCMOS/LVTTL CLOCK DIVIDER

ICS87001-01
LVCMOS/LVTTL CLOCK DIVIDER
Parameter Measurement Information, continued
CLK0, CLK1
Q
V_DD
2
V_DDO
2
t
PD
Propagation Delay
V
DDO
Q
2
t _PW
t
PERIOD
odc = ^{t PW} x 100%
t _PERIOD
Output Duty Cycle/Pulse Width/Period
20%
Q
80%
t_R
Output Rise/Fall Time
PRELIMINARY
80%
t_F
20%
Application Information
Recommendations for Unused Input Pins
Inputs:
LVCMOS Control Pins
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
CLK Inputs
For applications not requiring the use of a clock input, it can be left
floating. Though not required, but for additional protection, a 1kΩ
resistor can be tied from the CLK input to ground.
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
9
ICS87001BG-01 REV. A MAY 1, 2009