ICS87001-01 Datasheet, PDF (6/12 Pages) Integrated Device Technology – LVCMOS/LVTTL CLOCK DIVIDER

ICS87001-01
LVCMOS/LVTTL CLOCK DIVIDER
PRELIMINARY
Table 5C. AC Characteristics, V_DD = 3.3V ± 5%, V_DDO = 1.8V ± 0.15V, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
Minimum
f_MAX
t_PD
Output Frequency
Propagation Delay,
Low to High; NOTE 1
tsk(pp) Part-to-Part Skew; NOTE 2, 3
t_R / t_F
odc
Output Rise/Fall Time; NOTE 4
Output Duty Cycle
20% to 80%
t_EN
Output Enable Time; NOTE 4
t_DIS
Output Disable Time; NOTE 4
Typical
5
1
50
Maximum
250
5
5
Units
MHz
ns
ps
ns
%
ns
ns
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at IJ 250MHz unless noted otherwise.
NOTE 1: Measured from the V_DD/2 of the input to V_DDO/2 of the output.
NOTE 2: Defined as skew between outputs on different devices operating a the same supply voltage and with equal load conditions. Using
the same type of input on each device, the output is measured at V_DDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: This parameters are guaranteed by characterization. Not tested in production..
Table 5D. AC Characteristics, V_DD = V_DDO = 2.5V ± 5%, T_A = 0°C to 70°C
Symbol Parameter
Test Conditions
f_MAX
t_PD
Output Frequency
Propagation Delay,
Low to High; NOTE 1
tsk(pp) Part-to-Part Skew; NOTE 2, 3
t_R / t_F
odc
Output Rise/Fall Time; NOTE 4
Output Duty Cycle
20% to 80%
t_EN
Output Enable Time; NOTE 4
t_DIS
Output Disable Time; NOTE 4
Minimum
Typical Maximum Units
250
MHz
4.7
ns
ps
900
ps
50
%
5
ns
5
ns
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the
device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after
thermal equilibrium has been reached under these conditions.
All parameters measured at IJ 250MHz unless noted otherwise.
NOTE 1: Measured from the V_DD/2 of the input to V_DDO/2 of the output.
NOTE 2: Defined as skew between outputs on different devices operating a the same supply voltage and with equal load conditions. Using
the same type of input on each device, the output is measured at V_DDO/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: This parameters are guaranteed by characterization. Not tested in production.
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER
6
ICS87001BG-01 REV. A MAY 1, 2009