ICS844246I Datasheet, PDF (9/16 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

ICS844246I
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS844246I pro-
vides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V_DD, V_DDA, and V_DDO should
be individually connected to the power supply plane through vias,
and 0.01µF bypass capacitors should be used for each pin. Fig-
ure 1 illustrates this for a generic V_CC pin and also shows that
V
DDA
requires
that
an
additional10Ω
resistor
along
with
a
10µF
bypass capacitor be connected to the V pin.
DDA
3.3V
V_DD
.01μF 10Ω
V_DDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
OUTPUTS:
LVDS Outputs
All unused LVDS output pairs can be either left floating or
terminated with 100Ω across. If they are left floating, we
recommend that there is no trace attached.
CRYSTAL INPUT INTERFACE
The ICS844246 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2
below were determined using an 18pF parallel resonant
crystal and were chosen to minimize the ppm error.
X1
18pF Parallel Crystal
XTAL_OUT
C1
22p
XTAL_IN
C2
22p
FIGURE 2. CRYSTAL INPUt INTERFACE
IDT^™ / ICS^™ LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER 9
ICS844246BGI REV. A NOVEMBER 14, 2007