ICS844246I Datasheet, PDF (2/16 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

ICS844246I
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1, 2
V_DDO
Power
3, 4
nQ2, Q2 Output
Output supply pins.
Differential output pair. LVDS interface levels.
5, 6
nQ1, Q1 Output
Differential output pair. LVDS interface levels.
7, 8
nQ0, Q0 Output
Differential output pair. LVDS interface levels.
Selects between the PLL and crystal inputs as the input to the dividers.
9
PLL_BYPASS Input Pullup When LOW, selects PLL. When HIGH, selects XTAL_IN, XTAL_OUT.
LVCMOS / LVTTL interface levels.
10
V_DDA
Power
Analog supply pin.
11
V_DD
Power
Core supply pin.
12
FB_SEL
Input Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels.
13,
14
XTAL_IN,
XTAL_OUT
Input
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
15,
18
N_SEL0
N_SEL1
Input Pullup Output frequency select pin. LVCMOS/LVTTL interface levels.
16, 17
GND
Power supply ground.
19, 20
nQ5, Q5 Output
Differential output pair. LVDS interface levels.
21, 22
nQ4, Q4 Output
Differential output pair. LVDS interface levels.
23, 24
nQ3, Q3 Output
Differential output pair. LVDS interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
IDT^™ / ICS^™ LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER 2
ICS844246BGI REV. A NOVEMBER 14, 2007