ICS844246I Datasheet, PDF (6/16 Pages) Integrated Device Technology – FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER

ICS844246I
FEMTOCLOCKS™ CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY
TABLE 6A. AC CHARACTERISTICS, V_DD = V_DDO = 3.3V±5%, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum Typical
F_OUT
tjit(Ø)
tsk(o)
Output Frequency
RMS Phase Jitter (Random)
Output Skew; NOTE 1, 2
125MHz, Integration Range:
1.875MHz - 20MHz
53.125
0.39
TBD
t_R / t_F
Output Rise/Fall Time
20% to 80%
355
odc
Output Duty Cycle
50
t
LOCK
PLL Lock Time
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential crossing points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
333.33
1
Units
MHz
ps
ps
ps
%
ms
TABLE
6B.
AC
CHARACTERISTICS,
V
DD
=
3.3V±5%,
V
DDO
=
2.5V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
Minimum Typical
F_OUT
tjit(Ø)
tsk(o)
Output Frequency
RMS Phase Jitter (Random)
Output Skew; NOTE 1, 2
125MHz, Integration Range:
1.875MHz - 20MHz
53.125
0.38
TBD
t_R / t_F
Output Rise/Fall Time
20% to 80%
380
odc
Output Duty Cycle
50
t_LOCK
PLL Lock Time
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential crossing points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
Maximum
333.33
1
Units
MHz
ps
ps
ps
%
ms
IDT^™ / ICS^™ LVDS FREQUENCY SYNTHESIZER W/FANOUT BUFFER 6
ICS844246BGI REV. A NOVEMBER 14, 2007