ICS843SDN Datasheet, PDF(9/14 Page) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

ICS843SDN Datasheet, PDF (9/14 Pages) Integrated Device Technology – FEMTOCLOCK™ CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

◁

ICS843SDN

FEMTOCLOCKâ¢CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR

Schematic Example

Figure 5B shows an example of ICS843SDN P.C. board layout. The

crystal X1 footprint shown in this example allows installation of

either surface mount HC49S or through-hole HC49 package. The

footprints of other components in this example are listed in the

Table 6 There should be at least one decoupling capacitor per

power pin. The decoupling capacitors should be located as close

as possible to the power pins. The layout assumes that the board

has clean analog power ground plane.

Table 6. Footprint Table

Reference

Size

C1, C2

0402

0805

C4, C5

0603

NOTE: Table 6 lists component sizes

shown in this layout example.

Figure 5B. ICS843SDN PC Board Layout Example

IDTâ¢ / ICSâ¢ 3.3V LVPECL CLOCK GENERATOR

ICS843SDNAG REV. A FEBRUARY 19, 2009

▷