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840N022 Datasheet, PDF (9/13 Pages) Integrated Device Technology – FemtoClock® NG Crystal-to-LVCMOS/LVTTL Clock
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840N022 DATA SHEET
Power Considerations
This section provides information on power dissipation and junction temperature for the 840N022.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 840N022 is the sum of the core power plus the analog power plus the power dissipated in the load(s). The
following is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results.
• Power (core)MAX = VDD_MAX * (IDD + IDDA) = 3.465V *(67mA + 18mA) = 294.53mW
• Output Impedance ROUT Current due to Loading 50 to VDD/2
Output Current IOUT = VDD_MAX / [2 * (50 + ROUT)] = 3.465V / [2 * (50 + 15)] = 26.7mA
• Power Dissipation on the ROUT per LVCMOS output
Power (ROUT) = ROUT * (IOUT)2 = 15 * (26.7mA)2 = 10.7mW
• Total Power (ROUT) = 10.7mW * 1 = 10.7mW
Dynamic Power Dissipation at 125MHz
Power (125MHz) = CPD * Frequency * (VDD)2 = 11pF * 125MHz * (3.465V)2 = 16.51mW
Total Power (125MHz) = 16.51mW * 1 = 16.51mW
Total Power Dissipation
• Total Power
= Power (core)MAX + Power (ROUT) + Power (125MHz)
= 294.53mW + 10.7mW + 16.51mW
= 321.74mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj = JA * Pd_total + TA
Tj = Junction Temperature
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance JA must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 117°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.322W *117°C/W = 122.7°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resistance JA for 8 Lead TSSOP, Forced Convection
JA vs. Air Flow
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
117°C/W
REVISION A 8/14/15
9
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