74FCT38072S Datasheet, PDF (9/11 Pages) Integrated Device Technology – Low additive phase jitter RMS

74FCT38072S DATASHEET
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Millimeters
Inches*
8
INDEX
AREA
12
D
e
B
EH
Symbol
A
A1
B
C
D
E
e
H
h
L
a
Min Max
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0
8
Min Max
.0532 .0688
.0040 .0098
.013
.020
.0075 .0098
.1890 .1968
.1497 .1574
0.050 BASIC
.2284 .2440
.010
.020
.016
.050
0
8
*For reference only. Controlling dimensions in mm.
A
h x 45
A1
-C-
SEATING
PLANE

C ^{.10 (.004)}
C
L
Ordering Information
Part / Order Number
74FCT38072SDCGI
74FCT38072SDCGI8
74FCT38072SCMGI
74FCT38072SCMGI8
Marking
see page 6
Shipping Packaging
Tubes
Tape and Reel
Cut Tape
Tape and Reel
Package
8-pin SOIC
8-pin SOIC
8-pin DFN
8-pin DFN
“G” after the two-letter package code denotes Pb-Free configuration, RoHS compliant.
Temperature
-40 to +105 C
-40 to +105 C
-40 to +105 C
-40 to +105 C
REVISION A 03/18/15
9
LOW SKEW 1 TO 2 CLOCK BUFFER