844002 Datasheet, PDF (8/16 Pages) Integrated Device Technology – Two LVDS outputs

844002 DATA SHEET
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. To achieve optimum jitter
performance, power supply isolation is required. The 844002
provides separate power supplies to isolate any high switch-
ing noise from the outputs to the internal PLL. V , V and
DD
DDA
V should be individually connected to the power supply
DDO
plane through vias, and 0.01µF bypass capacitors should be
used for each pin. Figure 1 illustrates this for a generic V pin
CC
and also shows that V requires that an additional10Ω resistor
DDA
along with a 10µF bypass capacitor be connected to the V pin.
DDA
3.3V or 2.5V
V
DD
.01μF 10Ω
V
DDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The 844002 has been characterized with 18pF parallel
resonant crystals. The capacitor values shown in Figure 2 below
were determined using a 26.5625MHz, 18pF parallel resonant
crystal and were chosen to minimize the ppm error.
X1
18pF Parallel Crystal
C1
18pF
XTAL_IN
C2
18pF
XTAL_OUT
FIGURE 2. CRYSTAL INPUT INTERFACE
FEMTOCLOCKS™ CRYSTAL-TO-LVDS
8
FREQUENCY SYNTHESIZER
REVISION B 6/9/15