ICS9150-04 Datasheet, PDF (7/19 Pages) Integrated Circuit Systems – Pentium Pro™ and SDRAM Frequency Generator

ICS9150- 04
Select Functions
FUNCTION
DESCRIPTION
Tri - State
Test Mode
CPU
Hi-Z
TCLK/2¹
PCI,
PCI_F
Hi-Z
TCLK/4¹
Notes:
1. REF is a test clock on the X1 inputs during test mode.
OUTPUTS
SDRAM
Hi-Z
TCLK/2¹
REF
Hi-Z
TCLK¹
IOAPIC
Hi-Z
TCLK¹
Byte 1: CPU Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN# PWD
DESCRIPTION
-
1 Reserved
-
1 Reserved
-
1 Reserved
46 1 CPUCLK4 (Act/Inact)
48 1 CPUCLK3 (Act/Inact)
49 1 CPUCLK2 (Act/Inact)
51 1 CPUCLK1 (Act/Inact)
52 1 CPUCLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 3: SDRAM Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
35
36
38
39
41
42
44
45
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
SDRAM7 (Act/Inact)
SDRAM6 (Act/Inact)
SDRAM5 (Act/Inact)
SDRAM4 (Act/Inact)
SDRAM3 (Act/Inact)
SDRAM2 (Act/Inact)
SDRAM1 (Act/Inact)
SDRAM0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 2: PCICLK Clock Register
BIT PIN# PWD
DESCRIPTION
Bit 7 -
1 Reserved
Bit 6 8
1 PCICLK_F (Act/Inact)
Bit 5 16
1
PCICLK5 (Act/Inact)
Desktop Mode Only
Bit 4 14 1 PCICLK4 (Act/Inact)
Bit 3 13 1 PCICLK3 (Act/Inact)
Bit 2 12 1 PCICLK2 (Act/Inact)
Bit 1 11 1 PCICLK1 (Act/Inact)
Bit 0 9
1 PCICLK0 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
Byte 4: SDRAM Clock Register
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
24
25
32
33
18
19
21
22
PWD
1
1
1
1
1
1
1
1
DESCRIPTION
SDRAM15 (Act/Inact)
SDRAM14 (Act/Inact)
SDRAM13 (Act/Inact)
SDRAM12 (Act/Inact)
SDRAM11 (Act/Inact)
SDRAM10 (Act/Inact)
SDRAM9 (Act/Inact)
SDRAM8 (Act/Inact)
Notes: 1 = Enabled; 0 = Disabled, outputs held low
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