ICS843001I-23 Datasheet, PDF (7/24 Pages) Integrated Circuit Systems – FEMTOCLOCKS™ CRYSTAL-TO-3.3V LVPECL/LVCMOS FREQUENCY SYNTHESIZER

ICS843001I-23 Data Sheet
FEMTOCLOCK^® CRYSTAL/LVCMOS-TO-LVPECL/LVCMOS FREQUENCY SYNTHESIZER
Table 4F. LVPECL DC Characteristics, V_CC = 3.3V ± 5% or 2.5V ± 5%, V_{CCO_LVPECL} = 2.5V ± 5%, V_EE = 0V,
T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
V_OH
V_OL
V_SWING
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
V_{CCO_LVPECL} – 1.4
V_{CCO_LVPECL} – 2.0
0.4
V_{CCO_LVPECL} – 0.9
V_{CCO_LVPECL} – 1.5
1.0
NOTE 1: Outputs terminated with 50Ω to V_{CCO_LVPECL} – 2V.
Units
V
V
V
Table 5. Crystal Characteristics
Parameter
Test Conditions
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
NOTE: Characterized using an 18pF parallel resonant crystal.
Minimum Typical Maximum
Fundamental
19.44
27
50
7
Units
MHz
Ω
pF
AC Electrical Characteristics
Table 6A. AC Characteristics, V_CC = V_{CCO_LVCMOS} = V_{CCO_LVPECL} = 3.3V ± 5%, V_EE = 0V, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
f_OUT
Output Frequency
Q, nQ
REF_OUT
70
19.44
637.5
27
t_PD
Propagation Delay; CLK to
NOTE 1
REF_OUT
2.2
2.7
tjit(Ø)
RMS Phase Jitter, (Random);
NOTE 2
622.08MHz,
(12kHz – 20MHz)
0.97
f_VCO
PLL VCO Lock Range
1.12
Q, nQ
20% to 80%
200
t_R / t_F
Output
Rise/Fall Time
REF_OUT,
NOTE 3
20% to 80%
250
1.275
700
650
Q, nQ
46
54
odc
Output Duty Cycle _{REF_OUT;}
NOTE 3
Using Clock Input
48
52
t_LOCK
PLL Lock Time
60
Units
MHz
MHz
ns
ps
GHz
ps
ps
%
%
ms
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE 1: Measured from the V_CC/2 of the input to V_{CCO_LVCMOS}/2 of the output.
NOTE 2: Phase jitter measured using a 19.44MHz quartz crystal.
NOTE 3: REF_OUT output duty cycle characterized with CLK input duty cycle between 48% and 52%.
ICS843001CGI-23 REVISION A OCTOBER 4, 2011
7
©2011 Integrated Device Technology, Inc.