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83940D Datasheet, PDF (7/16 Pages) Integrated Device Technology – Maximum output frequency | |||
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83940D DATA SHEET
ADDITIVE PHASE JITTER
The spectral purity in a band at a speciï¬c offset from the fun-
damental compared to the power of the fundamental is called
the dBc Phase Noise. This value is normally expressed using
a Phase noise plot and is most often the speciï¬ed plot in many
applications. Phase noise is deï¬ned as the ratio of the noise
power present in a 1Hz band at a speciï¬ed offset from the fun-
damental frequency to the power value of the fundamental. This
ratio is expressed in decibels (dBm) or a ratio of the power in the
1Hz band to the power in the fundamental. When the required
offset is speciï¬ed, the phase noise is called a dBc value, which
simply means dBm at a speciï¬ed offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
Input/Output Additive Phase Jitter
at 155.52MHz = 0.03ps (typical)
10k
100k
1M
10M
100M
OFFSET FROM CARRIER FREQUENCY (HZ)
As with most timing speciï¬cations, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise ï¬oor of the equipment is higher
than the noise ï¬oor of the device. This is illustrated above. The
device meets the noise ï¬oor of what is shown, but can actually
be lower. The phase noise is dependant on the input source and
measurement equipment.
REVISION B 3/25/15
7
LOW SKEW, 1-TO-18
LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER
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