IDT82P2281_09 Datasheet, PDF (63/371 Pages) Integrated Device Technology – Single T1/E1/J1 Long Haul / Short Haul Transceiver

IDT82P2281
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
read from or written into the specified indirect register is determined by cated in the BUSY bit. Refer to Chapter 4.5 Indirect Register Access
the RWN bit and the data is in the D[7:0] bits. The access status is indi- Scheme for details about the indirect registers write/read access.
Table 38: Related Bit / Register In Chapter 3.16
Bit
Register
Address (Hex)
PCCE
SIGFIX (T1/J1 only)
POL (T1/J1 only)
RPLC Control Enable
ABXX (T1/J1 only)
TESTEN
PRBSDIR
TPLC / RPLC / PRGD Test Configuration
PRBSMODE[1:0]
TEST
STRKEN
ID * - Signaling Trunk Conditioning Code
A,B,C,D
GSUBST[2:0]
SIGSNAP
RPLC Configuration
GSTRKEN
DTRK[7:0]
ID - Data Trunk Conditioning Code
SUBST[2:0]
SINV
OINV
ID - Channel Control (for T1/J1) / Timeslot Control (for E1)
EINV
ADDRESS[6:0]
RWN
RPLC Access Control
D[7:0]
RPLC Access Data
BUSY
RPLC Access Status
Note:
* ID means Indirect Register in the Receive Payload Control function block.
0D1
0C7
RPLC ID - 41~58 (for T1/J1) / 41~4F & 51~5F (for E1)
0D0
RPLC ID - 21~38 (for T1/J1) / 20~3F (for E1)
RPLC ID - 01~18 (for T1/J1) / 00~1F (for E1)
0CE
0CF
0CD
Functional Description
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August 20, 2009