ICSSSTVA16859C Datasheet, PDF (6/10 Pages) Integrated Device Technology – DDR 13-Bit to 26-Bit Registered Buffer

ICSSSTVA16859C
DC Electrical Characteristics - DDRI-400 (PC3200)
T_A = 0 - 70°C; V_DD = 2.5 +/-0.2V, V_DDQ=2.5 +/-0.2V; (unless otherwise stated)
SYMBOL PARAMETERS
CONDITIONS
V_DDQ
V_IK
I_I = -18mA
2.5V
V_OH
I_OH = -100µA
2.5V-2.7V
I_OH = -8mA
2.7V
V_OL
I_OL = 100µA
I_OL = 8mA
2.5V-2.7V
2.5V
I_I
All Inputs
V_I = V_DD or GND
2.7V
Standby (Static)
RESET# = GND
I_{DD Operating (Static)}
V_I = V_IH(AC) or V_IL(AC),
RESET# = V_DD
RESET# = V_DD,
V_I
Dynamic operating
(clock only)
= V_IH(AC) or V_IL(AC), CLK
and CLK# switching 50%
duty cycle.
I_O = 0
2.7V
I_DDD
RESET# = V_DD,
V_I
= V_IH(AC) or V_{IL (AC)}, CLK
Dynamic Operating _{and CLK# switching 50%}
(per each data input) duty cycle. One data input
switching at half clock
frequency, 50% duty cycle
r_OH Output High
I_OH = -16mA
r_OL Output Low
I_OL = 16mA
r_O(D)
[r_OH - r_OL] each
separate bit
I_O = 20mA, T_A = 25° C
C_i
Data Inputs
CLK and CLK#
V_I = V_REF ±350mV
V_ICR = 1.25V, V_I(PP) = 360mV
Notes:
1 - Guaranteed by design, not 100% tested in production.
2.5V-2.7V
2.5V-2.7V
2.6V
2.6V
MIN
V_DDQ -
0.2
1.95
7
7
2.5
2.5
TYP
TBD
TBD
TBD
13.5
13
MAX
-1.2
UNITS
V
0.2
0.35
±5
µA
0.01
µA
mA
µ/clock MHz
µA/ clock
MHz/data
20
Ω
20
Ω
4
Ω
3.5
pF
3.5
1114A—05/26/05
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