ICS854S202I-01 Datasheet, PDF (6/17 Pages) Integrated Device Technology – 12:2, DIFFERENTIAL-TO-LVDS MULTIPLEXER

ICS854S202I-01
12:2, DIFFERENTIAL-LVDS MULTIPLEXER
PRELIMINARY
TABLE
4D.
LVDS
DC
CHARACTERISTICS,
V
DD
=
2.5V±5%,
TA
=
-40°C
TO
85°C
Symbol Parameter
Test Conditions
V_OD
∆ V_OD
V_OS
∆ V_OS
Differential Output Voltage
V_OD Magnitude Change
Offset Voltage
V_OS Magnitude Change
Minimum
Typical
400
50
1.3
50
Maximum
Units
mV
mV
V
mV
TABLE 5. AC CHARACTERISTICS, V_DD = 2.5V ± 5%, TA = -40°C TO 85°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
f_MAX
tp
LH
tp_HL
tsk(o)
Output Frequency
Propagation Delay, Low to High;
NOTE 1
Propagation Delay, High to Low;
NOTE 1
Output Skew; NOTE 2, 3
>3
GHz
650
ps
650
ps
25
ps
tsk(i)
Input Skew; NOTE 3
TBD
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
TBD
ps
Buffer Additive Phase Jitter, RMS;
155.52MHz,
tjit
refer to Additive Phase Jitter section,
Integration Range:
NOTE 5
12kHz - 20MHz
0.16
ps
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
110
ps
50
%
MUX_ISOLATION MUX Isolation
f_OUT < 1.2GHz
45
dB
All parameters measured at 500MHz, unless noted otherwise.
NOTE 1: Measured from V_DD/2 of the input to V_DD/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at V_DD/2.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 4: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V_DD/2.
NOTE 5: Driving only one input clock.
IDT^™ / ICS^™ LVDS MULTIPLEXER
6
ICS854S202AYI-01 REV. A JANUARY 8, 2007