ICS854S202I-01 Datasheet, PDF (13/17 Pages) Integrated Device Technology – 12:2, DIFFERENTIAL-TO-LVDS MULTIPLEXER

ICS854S202I-01
12:2, DIFFERENTIAL-LVDS MULTIPLEXER
POWER CONSIDERATIONS
PRELIMINARY
This section provides information on power dissipation and junction temperature for the ICS854S202I-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS854S202I-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V = 2.5V + 5% = 2.625V, which gives worst case results.
DD
• Power (core) = V * I = 2.625V * 110mA = 288.75mW
MAX
DD_MAX
DD_MAX
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS^TM devices is 125°C.
The equation for Tj is as follows: Tj = θ_JA * Pd_total + T_A
Tj = Junction Temperature
θ_JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T = Ambient Temperature
A
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ_JA must be used. Assuming a
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 57.4°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.289W * 57.4°C/W = 101.6°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow, and
the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θ FOR 48-LEAD LQFP, FORCED CONVECTION
JA
θ vs. Air Flow (Linear Feet per Minute)
JA
Multi-Layer PCB, JEDEC Standard Test Boards
0
67.2°C/W
200
57.4°C/W
500
53.8°C/W
IDT^™ / ICS^™ LVDS MULTIPLEXER
13
ICS854S202AYI-01 REV. A JANUARY 8, 2007