ICS8536-02 Datasheet, PDF (6/17 Pages) Integrated Device Technology – Low Skew, 1-to-6, Dual Crystal/LVCMOS-to-3.3V, 2.5V LVPECL Fanout Buffer

ICS8536-02 Data Sheet
1-TO-6, DUALCRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
AC Electrical Characteristics
Table 6A. AC Characteristics, V_CC = 3.3V ± 5%, V_EE = 0V, T_A = 0°C to 70°C
Symbol
Parameter
Test Conditions
f_OUT
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS; 155.52MHz, Integration Range:
NOTE 2
12kHz – 20MHz
tsk(o)
Output skew; NOTE 3, 4
tsk(pp)
Part-to-Part skew; NOTE 4, 5
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
MUX__ISOLATION MUX Isolation; NOTE 6
ƒ= 150MHz
ƒ= 250MHz
Minimum
1.35
200
47
Typical
0.149
48
45
Maximum
266
1.85
55
500
700
53
Units
MHz
ns
ps
ps
ps
ps
%
dB
dB
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at f_OUT unless noted otherwise.
NOTE 1: Measured from V_CC/2 of the input crossing point to the differential output crossing point.
NOTE 2: Driving CLK0 input.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 6: Measured on either XTAL0 or XTAL1 when single-ended CLK0 switching at 150MHz or 250MHz.
Table 6B. AC Characteristics, V_CC = 2.5V ± 5%, V_EE = 0V, T_A = 0°C to 70°C
Symbol
Parameter
Test Conditions
f_OUT
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS; 155.52MHz, Integration Range:
NOTE 2
12kHz – 20MHz
tsk(o)
Output skew; NOTE 3, 4
tsk(pp)
Part-to-Part skew; NOTE 4, 5
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
MUX__ISOLATION MUX Isolation; NOTE 6
ƒ= 150MHz
ƒ= 250MHz
Minimum
1.4
200
47
Typical
0.149
40
40
Maximum
266
1.9
55
500
700
53
Units
MHz
ns
ps
ps
ps
ps
%
dB
dB
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All parameters measured at f_OUT unless noted otherwise.
NOTE 1: Measured from V_CC/2 of the input crossing point to the differential output crossing point.
NOTE 2: Driving CLK0 input.
NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential
cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltage, same temperature, same frequency and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 6: Measured on either XTAL0 or XTAL1 when single-ended CLK0 switching at 150MHz or 250MHz.
ICS8536AG-02 REVISION A JULY 21, 2010
6
©2010 Integrated Device Technology, Inc.