ICS8536-02 Datasheet, PDF (2/17 Pages) Integrated Device Technology – Low Skew, 1-to-6, Dual Crystal/LVCMOS-to-3.3V, 2.5V LVPECL Fanout Buffer

ICS8536-02 Data Sheet
1-TO-6, DUALCRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
Table 1. Pin Descriptions
Number
1, 2
3, 19, 22
4, 5
6
7, 8
9,
16
10,
11
12
13
14,
15
17, 18
20, 21
23, 24
Name
nQ2, Q2
V_CC
nQ1, Q1
V_EE
nQ0, Q0
CLK_SEL0,
CLK_SEL1
XTAL_IN0,
XTAL_OUT0
CLK_EN
CLK0
XTAL_IN1,
XTAL_OUT1
nQ5, Q5
nQ4, Q4
nQ3, Q3
Type
Output
Power
Output
Power
Output
Description
Differential output pair. LVPECL interface levels.
Power supply pins.
Differential output pair. LVPECL interface levels.
Negative supply pin.
Differential output pair. LVPECL interface levels.
Input Pulldown Clock select pins. LVCMOS/LVTTL interface levels. See Table 3B.
Input
Input
Input
Input
Output
Output
Output
Pullup
Pulldown
Parallel resonant crystal interface.
XTAL_OUT0 is the output, XTAL_IN0 is the input.
Synchronizing clock enable. When HIGH, clock outputs follow clock input. When
LOW, the outputs are disabled. LVCMOS / LVTTL interface levels. See Table 3A.
Single-ended clock input. LVCMOS/LVTTL interface levels.
Parallel resonant crystal interface.
XTAL_OUT1 is the output, XTAL_IN1 is the input.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
C_IN
R_PULLUP
R_PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
ICS8536AG-02 REVISION A JULY 21, 2010
2
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