5T915 Datasheet, PDF (6/21 Pages) Integrated Device Technology – 2.5V Differential 1:5 Clock Buffer Terabuffer

5T915 DATA SHEET
DIFFERENTIAL INPUT AC TEST CONDITIONS FOR HSTL
Symbol
Parameter
Value
Units
VDIF
Input Signal Swing⁽¹⁾
1
V
VX
Differential Input Signal Crossing Point⁽²⁾
750
mV
VTHI
Input Timing Measurement Reference Level⁽³⁾
Crossing Point
V
tR, tF
NOTES:
Input Signal Edge Rate⁽⁴⁾
1
V/ns
1. The 1V peak-to-peak input pulse level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VDIF (AC)
specification under actual use conditions.
2. A 750mV crossing point level is specified to allow consistent, repeatable results in an automatic test equipment (ATE) environment. Compliant devices must meet the VX specification
under actual use conditions.
3. In all cases, input waveform timing is marked at the differential cross-point of the input signals.
4. The input signal edge rate of 1V/ns or greater is to be maintained in the 20% to 80% range of the input waveform.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR eHSTL⁽¹⁾
Symbol
Parameter
Test Conditions
Min.
Typ.⁽⁷⁾
Max
Unit
Input Characteristics
IIH
Input HIGH Current⁽⁹⁾
VDD = 2.6V
VI = VDDQ/GND
—
—
±5
μA
IIL
Input LOW Current⁽⁹⁾
VDD = 2.6V
VI = GND/VDDQ
—
—
±5
VIK
Clamp Diode Voltage
VDD = 2.4V, IIN = -18mA
—
- 0.7
- 1.2
V
VIN
DC Input Voltage
- 0.3
+3.6
V
VDIF
DC Differential Voltage^(2,8)
0.2
—
V
VCM
DC Common Mode Input Voltage^(3,8)
800
900
1000
mV
VIH
DC Input HIGH^(4,5,8)
VREF + 100
—
mV
VIL
DC Input LOW^(4,6,8)
—
VREF - 100
mV
VREF
Single-Ended Reference Voltage^(4,8)
—
900
—
mV
Output Characteristics
VOH
Output HIGH Voltage
IOH = -8mA
VDDQ - 0.4
—
V
IOH = -100μA
VDDQ - 0.1
—
V
VOL
Output LOW Voltage
IOL = 8mA
—
0.4
V
IOL = 100μA
—
0.1
V
NOTES:
1. See RECOMMENDED OPERATING RANGE table.
2. VDIF specifies the minimum input differential voltage (VTR - VCP) required for switching where VTR is the "true" input level and VCP is the "complement" input level. Differential mode only.
The DC differential voltage must be maintained to guarantee retaining the existing HIGH or LOW input. The AC differential voltage must be achieved to guarantee switching to a new
state.
3. VCM specifies the maximum allowable range of (VTR + VCP) /2. Differential mode only.
4. For single-ended operation, in a differential mode, A/VREF is tied to the DC voltage VREF.
5. Voltage required to maintain a logic HIGH, single-ended operation in differential mode.
6. Voltage required to maintain a logic LOW, single-ended operation in differential mode.
7. Typical values are at VDD = 2.5V, VDDQ = 1.8V, +25°C ambient.
8. The reference clock input is capable of HSTL, eHSTL, LVEPECL, 1.8V or 2.5V LVTTL operation independent of the device output. The correct input interface table should be referenced.
9. For differential mode (RxS = LOW), A and A/VREF must be at the opposite rail.
2.5V DIFFERENTIAL 1:5 CLOCK BUFFER
6
TERABUFFER™
REVISION A 11/3/15