ICS8545I-02 Datasheet, PDF (5/13 Pages) Integrated Device Technology – Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

ICS8545I-02 Data Sheet
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
AC Electrical Characteristics
Table 5. AC Characteristics, V_DD = 3.3V ± 5%, T_A = -40°C to 85°C
Symbol Parameter
Test Conditions
f_MAX
t_PD
tjit
Output Frequency
Propagation Delay; NOTE 1
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter Section
155.52MHz, Integration Range:
12kHz – 20MHz
tsk(o)
Output Skew; NOTE 2, 4
tsk(pp) Part-to-Part Skew; NOTE 3, 4
t_R / t_F
odc
Output Rise/Fall Time
Output Duty Cycle; NOTE 5
20% to 80%
ƒ ≤ 166MHz
ƒ> 166MHz
Minimum
1.0
150
45
40
Typical
0.14
Maximum
350
1.45
60
450
700
55
60
Units
MHz
ns
ps
ps
ps
ps
%
%
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
All parameters measured at f_MAX unless noted otherwise.
NOTE 1: Measured from V_DD/2 of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 5: Measured using 50% duty cycle.
ICS8545AGI-02 REVISION A JULY 29, 2009
5
©2009 Integrated Device Technology, Inc.