ICS8545I-02 Datasheet, PDF (11/13 Pages) Integrated Device Technology – Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

ICS8545I-02 Data Sheet
LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
Reliability Information
Table 7. θ_JA vs. Air Flow Table for a 20 Lead TSSOP
θ_JA by Velocity
Meters per Second
0
Multi-Layer PCB, JEDEC Standard Test Boards
91.1°C/W
1
86.7°C/W
2.5
84.6°C/W
Transistor Count
The transistor count for ICS8545I-02 is: 360
Package Outline and Package Dimensions
Package Outline - G Suffix for 20 Lead TSSOP
Table 8. Package Dimensions
All Dimensions in Millimeters
Symbol Minimum Maximum
N
20
A
1.20
A1
0.05
0.15
A2
0.80
1.05
b
0.19
0.30
c
0.09
0.20
D
6.40
6.60
E
6.40 Basic
E1
4.30
4.50
e
0.65 Basic
L
0.45
0.75
α
0°
8°
aaa
0.10
Reference Document: JEDEC Publication 95, MO-153
ICS8545AGI-02 REVISION A JULY 29, 2009
11
©2009 Integrated Device Technology, Inc.