8343-01 Datasheet, PDF (5/13 Pages) Integrated Device Technology – Maximumoutputfrequency

8343-01 DATA SHEET
Table 4C. LVCMOS / LVTTL DC Characteristics, V_DD = V_DD1 = V_DD2 = 3.3V ±5% or 2.5V ±5%, V_DD = 3.3V ±5%,
V_DD1 = V_DD2 = 2.5V±5%, T_A = 0°C to 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
V_IH
Input High
Voltage
OE1, OE2
CLK
Input Low
OE1, OE2
V_IL
Voltage
CLK
2
V_DD + 0.3
2
V_DD + 0.3
-0.3
0.8
-0.3
1.3
Input High
OE1, OE2 V_DD = V_IN = 3.465V or 2.625V
5
I_IH
Current
CLK
V_DD = V_IN = 3.465V or 2.625V
150
I_IL
OE1, OE2
V_DD = 3.465V or 2.625V,
-150
Input Low
V_IN = 0V
Current
CLK
V_DD = 3.465V or 2.625V,
V_IN = 0V
-5
V_OH
Output High Voltage¹
V_DD1 = V_DD2 = 3.465V
2.6
V_DD1 = V_DD2 = 2.625V
1.8
V_OL
Output Low Voltage
V_DD1 = V_DD2 = 3.465V or
2.625V
0.5
I_OZL
Output Tristate Current Low
5
I_OZH
Output Tristate Current High
5
NOTE 1: Outputs terminated with 50to V_DDx /2. See Parameter Measurement Information, “Output Load Test Circuit Diagrams”.
Units
V
V
V
V
A
A
A
A
V
V
V
A
A
REVISION B 08/25/14
5
LOW SKEW, 1-TO-16 LVCMOS / LVTTL FANOUT BUFFER