English
Language : 

7134SA55J Datasheet, PDF (5/12 Pages) Integrated Device Technology – HIGH-SPEED 4K x 8 DUAL-PORT STATIC SRAM
IDT7134SA/LA
High-Speed 4K x 8 Dual-Port Static SRAM
Military, Industrial and Commercial Temperature Ranges
Data Retention Characteristics Over All Temperature Ranges
(LA Version Only) VLC = 0.2V, VHC = VCC - 0.2V
Symbol
Parameter
Test Condition
Min.
Typ.(1)
Max. Unit
VDR
VCC for Data Retention
VCC = 2V
2.0
___
___
V
ICCDR
Data Retention Current
CE > VHC
MIL. & IND.
___
100
4000 µA
VIN > VHC or < VLC
COM'L.
___
100
1500
tCDR(3)
Chip Dese lect to Data Retention Time
0
___
___
ns
tR(3)
Operation Recovery Time
tRC(2)
___
___
ns
NOTES:
1. VCC = 2V, TA = +25°C, and are not production tested.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed by device characterization, but not production tested.
2720 tbl 07
Data Retention Waveform
VCC
4.5V
tCDR
CE
VIH
DATA RETENTION MODE
VDR ≥ 2V
VDR
4.5V
tR
VIH
2720 drw 05
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
Figures 1 and 2
2720 tbl 08
+5V
DATAOUT
775Ω
1250Ω
30pF
2720 drw 06 ,
Figure 1. AC Output Test Load
+5V
DATAOUT
775Ω
1250Ω
5pF *
,
2720 drw 07
Figure 2. Output Test Load
(for tLZ, tHZ, tWZ, tOW)
*Including scope and jig
5