English
Language : 

8T49N281_16 Datasheet, PDF (49/67 Pages) Integrated Device Technology – FemtoClock NG Octal Universal Frequency Translator
8T49N281 Datasheet
2.5V Differential Clock Input Interface
CLKx/nCLKx accepts LVDS, LVHSTL, LVPECL and other differential
signals. Both VSWING and VOH must meet the VPP and VCMR input
requirements. Figure 8A to Figure 8D show interface examples for
the CLKx/nCLKx input driven by the most common driver types. The
input interfaces suggested here are examples only. Please consult
with the vendor of the driver component to confirm the driver
termination requirements. For example, in Figure 8A, the input
termination applies for IDT open emitter LVHSTL drivers. If you are
using an LVHSTL driver from another vendor, use their termination
recommendation.
1.8V
Zo = 50
Zo = 50
LVHSTL
IDT Open Emitter
LVHSTL Driver
2.5V
CLK
R1
R2
50
50
nCLK
Differential
Input
Figure 8A. CLKx/nCLKx Input Driven by an IDT 
Open Emitter LVHSTL Driver
Figure 8C. CLKx/nCLKx Input Driven by a 
2.5V LVPECL Driver
Figure 8B. CLKx/nCLKx Input Driven by a 
2.5V LVPECL Driver
Figure 8D. CLKx/nCLKx Input Driven by a 
2.5V LVDS Driver
©2016 Integrated Device Technology, Inc.
49
Revision 7, October 26, 2016